1. Field of the Invention
The exemplary embodiments of the invention generally relate to cross patterns of air gaps in a wiring layer of a multilayer integrated circuit (IC) and the making of same. More specifically, exemplary embodiments of the invention relate to cross patterns of air gaps that are independent of the wiring layout, are easily produced by conventional photolithography, and provide a comparatively uniform reduction of parasitic capacitance.
2. Description of the Related Art
Wiring layers within multilayer IC chips interconnect various circuit components, ground terminals and power terminals of underlying and/or overlying layers by patterned layouts of metal wiring. Within a wiring layer, metal wiring of a particular path is electrically insulated from other metal wiring paths by an intra-layer dielectric, while individual wiring layers are separated from each other by an inter-layer dielectric. Electrically conductive vias are formed in the inter-layer dielectric to provide electrical connections between the wiring layer and other layers.
The placement of metal wiring paths for a wiring layer is conventionally accomplished by computerized wiring layout rules used in design of the multilayer IC. Wiring layout rules can comprise uni-directional wiring layout rules, in which individual wires connecting various circuit components, ground terminals, or power terminals to the underlying and/or overlying layers are laid out in a single direction that corresponds to one of the planar axes of the wiring layer, or bi-directional wiring layout rules, in which the individual wires are laid out according to two directions that correspond to the two orthogonal planar axes of the wiring layer, and can include right angles formed by the two directions.
Different dielectric and wiring materials, and the layout of wiring paths substantially affect signal propagation delays along the wiring paths, and thus, the integrated circuit's performance. Signal propagation delays are due to RC time constants, where R is the resistance of the wiring path, and C is the effective capacitance between the wiring path and surrounding materials in the multilayer IC. RC time constants can be reduced by lowering the specific resistance of the wiring material, and/or by using inter-layer and intra-layer dielectrics (ILDs) with low dielectric constants.
Conventional, low RC wiring layers frequently use copper metal for the wiring paths and silicon dioxide for the intra-layer and inter-layer dielectrics. Silicon dioxide has a relatively low dielectric constant, k, of about 4.0. Alternative, low k dielectrics include carbon-based solids, such as diamond-like carbon (DLC), fluorinated DLC, SiCO and SiCOH compounds, and organic or inorganic polymer dielectrics. Air gaps, however, have the lowest k of any material, i.e., k≈1.00, in which the air gap may include air, a gas, or vacuum.
Air gaps are conventionally formed in the intra-layer dielectric material of a wiring layer by one of two methods: 1) patterned sacrificial material is formed within the wiring layer and is subsequently removed from beneath an overlying permeable bridge layer by diffusion upon low temperature oxidation, leaving a cavity defining the air gap; and 2) patterned sacrificial material is formed within the wiring layer and subsequently removed from beneath an overlying perforated bridge layer by an aggressive process, for example, plasma-etching by a reactive gas, via perforation(s) of the bridge layer, and then pinching-off of the perforation(s) of the bridge layer, forming a cavity defining the air gap.
FIGS. 1A-1B and 2A-2C illustrate, in cross-sectional view, two conventional methods that are used to form air gaps. In particular, FIGS. 1A-1B illustrate forming an air gap in a cavity bounded by a substrate 10, conductors 20, and a permeable bridge layer 30. Upon, for example, low temperature oxidation, the sacrificial material 40 in FIG. 1A forms volatiles, which then diffuse through permeable bridge layer 30 to form air gap 50 of FIG. 1B. FIGS. 2A-2C illustrate forming an air gap in a structure containing a perforated bridge layer 60 with a perforation 70. The sacrificial material 40 in FIG. 2A is removed via the perforation 70 to form the air gap 80 in FIG. 2B by an aggressive process, for example, plasma-etching by a reactive gas. Perforation 70 may then be pinched-off by depositing an overlying dielectric layer 90 to form the air gap of FIG. 2C.
The method by which the sacrificial material is removed depends on: the particular sacrificial material employed; the other materials in the wiring layer, to which the particular sacrificial material removal process must be selective; and whether the bridge layer is permeable or possesses perforations.
Various sacrificial materials and removal methods include poly(methyl methacrylate) (PMMA) and Parylene™, i.e., poly-para-xylylene, which may be removed by organic solvents, oxygen ashing, and/or low temperature (≈200° C.) oxidation, and norborene-based materials such as BF Goodrich's Unity™ Sacrificial Polymer, which may be removed by low temperature (350-400° C.) thermal decomposition into volatiles. In the case of Unity™, diffusion of the volatiles through a bridge layer can occur for silicon dioxide bridge layers of approximately 500 nm thickness.
Conventionally, air gaps in wiring layers generally follow wiring layout rules to produce air gaps aligned along the lengths of wires to reduce parasitic capacitance. Thus, the analysis of reduced capacitance in conventionally formed air gaps is relatively complex, depending inter alia on the length and geometry of particular wiring paths, the distance between a wire of the particular wiring paths to surrounding conductors and semiconductors, and the size and geometry of individual air gaps surrounding each of the wires. In addition, because conventionally formed air gaps are aligned along the lengths of the various wires in a wiring layer, the photolithographic patterning of these air gaps is relatively complex.